Altera · San Francisco
Mechanical & Aerospace
We are seeking a motivated and detail-oriented Analog Layout Design Engineer to join our semiconductor design team. This entry-level role is ideal for recent college graduates with a strong academic background in Electrical Engineering, Electronics, or a related field. You will work alongside experienced engineers to develop state-of-the-art analog and mixed-signal integrated circuits (ICs) for cutting-edge applications.
Key Responsibilities
Collaborate with circuit design engineers to interpret schematics and define layout requirements.
Create and optimize layout designs for analog and mixed-signal IC blocks (e.g., amplifiers, data converters, PLLs, LDOs).
Ensure designs meet electrical, physical, and manufacturing requirements for performance, area, and reliability.
Perform layout verification, including Design Rule Check (DRC), Layout Versus Schematic (LVS), and Electrical Rule Check (ERC).
Work with EDA tools such as Cadence Virtuoso, Mentor Graphics, or Synopsys for layout and verification tasks.
Participate in design reviews and contribute to continuous improvement of layout methodologies.
Document layout practices and maintain version control for design data.
Required Qualifications
Bachelor’s degree in Electrical Engineering, Electronics, Microelectronics, or related field.
Basic knowledge of analog/mixed-signal circuit design concepts.
Familiarity with IC layout tools (Cadence Virtuoso or similar EDA tools) is a plus.
Strong analytical and problem-solving skills.
Attention to detail and commitment to high-quality work.
Good communication skills and ability to work effectively in a team environment.
Eagerness to learn and adapt to new technologies and methodologies.
Preferred Qualification
Internship or project experience in IC design or layout.
Coursework in semiconductor device physics, VLSI design, or analog circuits.
Exposure to scripting languages (e.g., Python, SKILL) for design automation