Signal Integrity/ Power Integrity Engineer

Job Details:

Job Description:

Altera, a leader in programmable solutions from cloud to edge, delivers cutting-edge FPGA, CPLD, and IP technologies. We drive innovation in high-speed connectivity, AI acceleration, and next-generation data infrastructure. Our mission is to empower engineers to design and deploy advanced systems with unmatched flexibility and performance.

We are seeking a Signal and Power Engineer to join our SERDES Analog team in Haifa and support the integration of mixed-signal and high-speed SERDES IPs into full-chips silicon design, packages and PCBs. This role is ideal for early-career engineers looking to grow their hands-on design skills while working alongside experienced engineers.

• SERDES IP System Simulation Support: SERDES IPs reference channel definition, creation and parameters extraction under guidance from a senior engineer

• SERDES IPs Integration Support: Silicon IPs parameters review and validation with conjunction the package and PCBs design according to the interface specification

• Package and PCB Design Verification: Participate in the package and PCB schematics and layouts review activities, review simulations results, and help debug and resolve failing simulations

• Mixed-Signal and Channel Simulation: Learn and apply Signal and Power Integrity environments concepts, including SIPI circuits, channels and IOs simulation to support the optimisation of the package and PCB designs

• Design Quality and Optimization: Support efforts to meet power, performance and signal integrity requirements, ensuring the package and PCB designs are suitable for implementation

• Cross-Team Collaboration: Work with internal teams to ensure successful IPs, packages and PCBs integration and high-quality design delivery

Qualifications:

• B.Sc or M.Sc Electrical Engineer graduate from well recognized universities.

• Strong background in electromagnetic and waves theory of physics

• High motivated junior engineer with previous gathered experience from the university projects

• Team players who enjoy big challenges

• Ability to the study and implementation of the learned material and theory in the multidisciplinary domains: Analog and Digital Electronics, Signal and Power Integrity

• Applicants must include their academic grades sheet as part of the application

• Experience in ASIC package design, including optimizing pinouts, stack-ups, and high-speed routing

• Knowledge of silicon floor planning, signal integrity (SI), and power integrity (PI) considerations

• Hands-on experience with advanced testing and measurement equipment, including oscilloscopes and TDR/VNA analyzers

• Understanding of high-speed signal design and power distribution networks (PDN)

Job Type:

Regular

Shift:

Shift 1 (Israel)

Primary Location:

Haifa, Israel

Additional Locations:

Jerusalem, Israel, TLV

Posting Statement:

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.