Marvell · San Francisco
Otherposted 5d ago
About Marvell
Marvell’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, and carrier architectures, our innovative technology is enabling new possibilities.
At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead.
Your Team, Your Impact
Marvell’s Ethernet PAM4 Validation team is responsible for validating high-speed connectivity products used in data centers, AI clusters, cloud infrastructure, and enterprise networking platforms. The team works on DSP/PHY/device-level validation, switch interoperability, firmware upgrade validation, link recovery, optical and cable validation, DSP tuning, automation, and customer issue debug.What You Can Expect
Develop Python, Shell, and automation scripts for test execution, data collection, log parsing, regression coverage, and dashboard reporting.
Build AI-assisted and agentic validation workflows for automated test execution, failure triage, log analysis, anomaly detection, root-cause recommendation, and debug artifact collection.
Develop intelligent debug agents that analyze telemetry, FEC counters, firmware logs, register dumps, and validation results to reduce manual debug effort and accelerate customer issue closure.
Collaborate with firmware, design, systems, software, application, and customer engineering teams to define validation coverage, reproduce failures, verify fixes, and drive issue closure.
Support critical customer programs and product delivery milestones by improving validation coverage, execution efficiency, automation, debug quality, and product readiness.
Develop validation plans for Ethernet PAM4 DSP, PHY, ASIC, AEC/ACC, optical, and switch-facing products.
Execute device-level and switch-level post-silicon validation, including bring-up, interoperability, functional testing, performance characterization, stress testing, and link stability validation.
Validate high-speed Ethernet links across firmware builds, CDB configurations, traffic patterns, cable types, optical modules, switches, and customer-like operating conditions.
Debug link-up, link-flap, signal integrity, firmware upgrade, CDB upgrade, interoperability, and customer-reported issues using lab equipment, logs, counters, telemetry, and register-level analysis.
What We're Looking For
Must Have:
Bachelor’s degree in Computer Science, Electrical Engineering, Electronics Engineering, or related fields with 3–15 years of professional experience, or Master’s/PhD in a related field with 2–10 years of experience.
Hands-on lab experience using oscilloscopes, BERTs, protocol analyzers, optical switches, traffic generators, temperature chambers, or similar validation equipment.
Strong automation skills using Python, Shell, or similar scripting languages for test execution, data collection, log parsing, and result analysis.
Experience with C/C++ or low-level software development for hardware control, register access, firmware interaction, or test development is preferred.
Familiarity with Linux environments, device drivers, hardware/software interaction, lab servers, CI systems, and validation infrastructure.
Strong debugging skills for link-up issues, signal integrity problems, firmware failures, interoperability issues, and customer-reported defects.
Ability to analyze large volumes of validation data, logs, counters, telemetry, and test results to identify root cause and drive closure.
Clear communication skills to collaborate with firmware, silicon, systems, software, applications, and customer engineering teams.
Ability to work independently in a fast-paced, ambiguous hardware development environment with aggressive customer and product delivery timelines.
Curiosity and passion for understanding how complex silicon, firmware, and system-level Ethernet products behave in real deployment conditions.
Nice to Have:
Experience in validation, bring-up, debug, or characterization of DSPs, PHYs, SoCs, ASICs, CPUs, GPUs, or high-speed networking devices.
Hands-on experience with Ethernet validation, PAM4 signaling, switch-level interoperability, device-level validation, or high-speed SerDes bring-up.
Knowledge of high-speed interfaces such as Ethernet, PCIe, I2C, MDIO, CMIS, or related hardware/software control interfaces.
Experience working with switches, optics, AEC/ACC cables, PHY/DSP devices, firmware builds, and system-level validation environments.
Expected Base Pay Range (USD)
131,010 - 196,300, $ per annumThe successful candidate’s starting base pay will be determined based on job-related skills, experience, qualifications, work location and market conditions. The expected base pay range for this role may be modified based on market conditions.

This role is eligible to participate in Marvell's bonus and equity plans, including a new hire equity grant and annual equity refreshers, ensuring you are rewarded for your contributions and remain invested in the company's long-term success.
Additional Compensation and Benefit Elements
Marvell is committed to providing exceptional, comprehensive benefits that support our employees at every stage - from internship to retirement and through life’s most important moments. Our offerings are built around four key pillars: financial well-being, family support, mental and physical health, and recognition. Highlights include an employee stock purchase plan with a 2-year look back, family support programs to help balance work and home life, robust mental health resources to prioritize emotional well-being, and a recognition and service awards to celebrate contributions and milestones. We look forward to sharing more with you during the interview process.All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.
Any applicant who requires a reasonable accommodation during the selection process should contact Marvell HR Helpdesk at TAOps@marvell.com.
Interview Integrity
To support fair and authentic hiring practices, candidates are not permitted to use AI tools (such as transcription apps, real-time answer generators like ChatGPT or Copilot, or automated note-taking bots) during interviews.
These tools must not be used to record, assist with, or enhance responses in any way. Our interviews are designed to evaluate your individual experience, thought process, and communication skills in real time. Use of AI tools without prior instruction from the interviewer will result in disqualification from the hiring process.
This position may require access to technology and/or software subject to U.S. export control laws and regulations, including the Export Administration Regulations (EAR). As such, applicants must be eligible to access export-controlled information as defined under applicable law. Marvell may be required to obtain export licensing approval from the U.S. Department of Commerce and/or the U.S. Department of State. Except for U.S. citizens, lawful permanent residents, or protected individuals as defined by 8 U.S.C. 1324b(a)(3), all applicants may be subject to an export license review process prior to employment.
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